[PATCH qemu-server v3] query-machine-capabilities: limit AuthenticAMD and GenuineIntel checks to x86-64

[PATCH qemu-server v3] query-machine-capabilities: limit AuthenticAMD and GenuineIntel checks to x86-64

[Kaiyang Wu]

Intel TDX and AMD SEV are both x86-64-only extensions [0] [1]. The current
method of checking results in compilation errors on "unknown" vendors,
where the current placeholder string length ("Unknown") mismatches the
lengths of both "AuthenticAMD" and "GenuineIntel":

    error: ‘strncmp’ of strings of length 7 and 12 and bound of 12
    evaluates to nonzero [-Werror=string-compare]

Limit the machine capability checks for Intel TDX and AMD SEV to x86-64 to
fix build.

[0]: https://docs.kernel.org/arch/x86/tdx.html
[1]: https://docs.kernel.org/virt/kvm/x86/amd-memory-encryption.html

Signed-off-by: Kaiyang Wu <wukaiyang@loongfans.cn>
---

v1: https://lore.proxmox.com/pve-devel/20260603055031.106241-1-wukaiyang@loongfans.cn/
v2: https://lore.proxmox.com/pve-devel/20260729111024.58285-2-wukaiyang@loongfans.cn/

Changes v1 -> v2:
- Use conditional compilation to limit Intel TDX and AMD SEV checks to x86-64
- Eliminate the vendor string length check

Changes v2 -> v3:
- Remove the extra 'else' block to fix compilation on aarch64

 .../query-machine-capabilities.c              | 31 +++++++++----------
 1 file changed, 15 insertions(+), 16 deletions(-)

diff --git a/src/query-machine-capabilities/query-machine-capabilities.c b/src/query-machine-capabilities/query-machine-capabilities.c
index abb47acd..b47ed698 100644
--- a/src/query-machine-capabilities/query-machine-capabilities.c
+++ b/src/query-machine-capabilities/query-machine-capabilities.c
@@ -204,6 +204,7 @@ int main() {
         eprintf("Error writing to file '" OUTPUT_PATH "': %s\n", strerror(errno));
     }
 
+#ifdef __x86_64__
     if (strncmp(vendor, "AuthenticAMD", 12) == 0) {
         cpu_caps_amd_sev_t caps_sev;
         query_cpu_capabilities_sev(&caps_sev);
@@ -233,22 +234,20 @@ int main() {
             );
         }
     }
-#ifdef __aarch64__
-    else {
-        cpu_caps_arm_t caps_arm;
-        query_cpu_capabilities_arm(&caps_arm);
-
-        ret = fprintf(file,
-            " \"arm-caps\": {"
-            " \"vendor\": \"%s\","
-            " \"aes\": %s,"
-            " \"sha2\": %s"
-            " }",
-            vendor,
-            caps_arm.aes ? "true" : "false",
-            caps_arm.sha2 ? "true" : "false"
-        );
-    }
+#elif defined(__aarch64__)
+    cpu_caps_arm_t caps_arm;
+    query_cpu_capabilities_arm(&caps_arm);
+
+    ret = fprintf(file,
+        " \"arm-caps\": {"
+        " \"vendor\": \"%s\","
+        " \"aes\": %s,"
+        " \"sha2\": %s"
+        " }",
+        vendor,
+        caps_arm.aes ? "true" : "false",
+        caps_arm.sha2 ? "true" : "false"
+    );
 #endif
 
     if (ret < 0) {
-- 
2.55.0