From: "Fabian Grünbichler" <f.gruenbichler@proxmox.com>
To: pve-devel@lists.proxmox.com, Fiona Ebner <f.ebner@proxmox.com>
Subject: [pve-devel] applied: [PATCH qemu-server] close #6378: expose guest-phys-bits CPU option
Date: Wed, 13 Aug 2025 09:34:46 +0200 [thread overview]
Message-ID: <175507047563.131499.4171779938524182465.b4-ty@proxmox.com> (raw)
In-Reply-To: <20250812153144.154949-1-f.ebner@proxmox.com>
On Tue, 12 Aug 2025 17:30:14 +0200, Fiona Ebner wrote:
> Quoting Fabian Grünbichler from the bug report:
>
> > Intel ships some CPUs where the CPU address width and the IOMMU
> > address width are different, which requires setting that option to
> > properly support huge pages and/or VFIO:
> >
> > https://bugzilla.kernel.org/show_bug.cgi?id=220057
> > https://lore.kernel.org/all/20250502224035.3183451-1-alex.williamson@redhat.com/t
> > https://lore.kernel.org/qemu-devel/20250130134346.1754143-1-clg@redhat.com/
>
> [...]
Applied, thanks!
Note that there also is https://bugzilla.proxmox.com/show_bug.cgi?id=6608 which
is tangentially related and might be nice to fix, even though the user hasn't
reported back so far..
[1/1] close #6378: expose guest-phys-bits CPU option
commit: 2f3c741bfdffc49b50e17274bc25881a41f57ff7
Best regards,
--
Fabian Grünbichler <f.gruenbichler@proxmox.com>
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prev parent reply other threads:[~2025-08-13 7:34 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-12 15:30 [pve-devel] " Fiona Ebner
2025-08-13 7:34 ` Fabian Grünbichler [this message]
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