superseded: [PATCH qemu-server v2] query-machine-capabilities: limit AuthenticAMD and GenuineIntel checks to x86-64

[Kaiyang Wu <wukaiyang2003@gmail.com>]

Superseded by 
https://lore.proxmox.com/pve-devel/20260730014713.64822-2-wukaiyang@loongfans.cn/

On 2026-07-30 00:05, Kaiyang Wu wrote:
> On 7/29/26 23:33, Fiona Ebner wrote:
>> Am 29.07.26 um 1:11 PM schrieb Kaiyang Wu:
>>> Intel TDX and AMD SEV are both x86-64-only extensions [0] [1]. The current
>>> method of checking results in compilation errors on "unknown" vendors,
>>> where the current placeholder string length ("Unknown") mismatches the
>>> lengths of both "AuthenticAMD" and "GenuineIntel":
>>>
>>> error: ‘strncmp’ of strings of length 7 and 12 and bound of 12
>>> evaluates to nonzero [-Werror=string-compare]
>>>
>>> Limit the machine capability checks for Intel TDX and AMD SEV to x86-64 to
>>> fix build.
>>>
>>> [0]: https://docs.kernel.org/arch/x86/tdx.html
>>> [1]: https://docs.kernel.org/virt/kvm/x86/amd-memory-encryption.html
>>>
>>> Signed-off-by: Kaiyang Wu <wukaiyang@loongfans.cn>
>>> ---
>>>
>>> v1: https://lore.proxmox.com/pve-devel/20260603055031.106241-1-wukaiyang@loongfans.cn/
>>>
>>> Changes v1 -> v2:
>>> - Use conditional compilation to limit Intel TDX and AMD SEV checks to x86-64
>>> - Eliminate the vendor string length check
>>>
>>> src/query-machine-capabilities/query-machine-capabilities.c | 3 ++-
>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/src/query-machine-capabilities/query-machine-capabilities.c b/src/query-machine-capabilities/query-machine-capabilities.c
>>> index abb47acd..3ccd30da 100644
>>> --- a/src/query-machine-capabilities/query-machine-capabilities.c
>>> +++ b/src/query-machine-capabilities/query-machine-capabilities.c
>>> @@ -204,6 +204,7 @@ int main() {
>>> eprintf("Error writing to file '" OUTPUT_PATH "': %s\n", strerror(errno));
>>> }
>>>
>>> +#ifdef __x86_64__
>>> if (strncmp(vendor, "AuthenticAMD", 12) == 0) {
>>> cpu_caps_amd_sev_t caps_sev;
>>> query_cpu_capabilities_sev(&caps_sev);
>>> @@ -233,7 +234,7 @@ int main() {
>>> );
>>> }
>>> }
>>> -#ifdef __aarch64__
>>> +#elif defined(__aarch64__)
>>> else {
>>
>> I guess this won't compile on aarch64 now, as there will be an else
>> without an if?
> 
> I will fix this in v3. Thank you for pointing it out.
> 
>>
>>> cpu_caps_arm_t caps_arm;
>>> query_cpu_capabilities_arm(&caps_arm);
>>
>>
>> Also, did you already submit a signed CLA to office@proxmox.com? See:
>> https://pve.proxmox.com/wiki/Developer_Documentation#Software_License_and_Copyright
>>
> 
> Yes, I have already submitted a signed CLA for my entity (sent from
> this email address on May 28, 2026).