From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from firstgate.proxmox.com (firstgate.proxmox.com [212.224.123.68]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.proxmox.com (Postfix) with ESMTPS id B088D9DF08 for ; Tue, 6 Jun 2023 14:10:10 +0200 (CEST) Received: from firstgate.proxmox.com (localhost [127.0.0.1]) by firstgate.proxmox.com (Proxmox) with ESMTP id 91D853464C for ; Tue, 6 Jun 2023 14:09:40 +0200 (CEST) Received: from proxmox-new.maurer-it.com (proxmox-new.maurer-it.com [94.136.29.106]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by firstgate.proxmox.com (Proxmox) with ESMTPS for ; Tue, 6 Jun 2023 14:09:39 +0200 (CEST) Received: from proxmox-new.maurer-it.com (localhost.localdomain [127.0.0.1]) by proxmox-new.maurer-it.com (Proxmox) with ESMTP id CCA4F46C3C; Tue, 6 Jun 2023 14:09:38 +0200 (CEST) Message-ID: Date: Tue, 6 Jun 2023 14:09:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Content-Language: en-US To: Proxmox VE development discussion , Alexandre Derumier References: <20230602100551.2224246-1-aderumier@odiso.com> <20230602100551.2224246-2-aderumier@odiso.com> From: Fiona Ebner In-Reply-To: <20230602100551.2224246-2-aderumier@odiso.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-SPAM-LEVEL: Spam detection results: 0 AWL -0.001 Adjusted score from AWL reputation of From: address BAYES_00 -1.9 Bayes spam probability is 0 to 1% DMARC_MISSING 0.1 Missing DMARC policy KAM_DMARC_STATUS 0.01 Test Rule for DKIM or SPF Failure with Strict Alignment NICE_REPLY_A -0.094 Looks like a legit reply (A) SPF_HELO_NONE 0.001 SPF: HELO does not publish an SPF Record SPF_PASS -0.001 SPF: sender matches SPF record T_SCC_BODY_TEXT_LINE -0.01 - Subject: Re: [pve-devel] [PATCH v4 qemu-server 1/1] cpuconfig: add new x86-64-vX models X-BeenThere: pve-devel@lists.proxmox.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Proxmox VE development discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Jun 2023 12:10:10 -0000 Am 02.06.23 um 12:05 schrieb Alexandre Derumier: > https://lists.gnu.org/archive/html/qemu-devel/2021-06/msg01592.html > " > In 2020, AMD, Intel, Red Hat, and SUSE worked together to define > three microarchitecture levels on top of the historical x86-64 > baseline: > > * x86-64: original x86_64 baseline instruction set > * x86-64-v2: vector instructions up to Streaming SIMD > Extensions 4.2 (SSE4.2) and Supplemental > Streaming SIMD Extensions 3 (SSSE3), the > POPCNT instruction, and CMPXCHG16B > * x86-64-v3: vector instructions up to AVX2, MOVBE, > and additional bit-manipulation instructions. > * x86-64-v4: vector instructions from some of the > AVX-512 variants. > " Can we also link to https://gitlab.com/x86-psABIs/x86-64-ABI/ because table 3.1 in the PDF contains a bit more precise information? I used the following to test for some instructions, but feel free to tell me something better ;) > int main() > { > __asm__ __volatile__ > ( > "xgetbv" > ); > return 0; > } I also found https://gist.github.com/rindeal/81198b1cf8f55c356743 and after adding #include to the cpuid-dump2.c it seemed to work. > > This patch add new builtin model derivated from qemu64 model, > to be compatible between intel/amd. > > x86-64-v1 : I'm skipping it, as it's basicaly qemu64|kvm64 -vme,-cx16 for compat Opteron_G1 from 2004 > so will use it as qemu64|kvm64 is higher are not working on opteron_g1 anyway > > x86-64-v2 : Derived from qemu, +popcnt;+pni;+sse4.1;+sse4.2;+ssse3 > > min intel: Nehalem > min amd : Opteron_G3 > > x86-64-v2-AES : Derived from qemu, +aes;+popcnt;+pni;+sse4.1;+sse4.2;+ssse3 Could you describe how you chose/tested the flags? >From the table in the PDF, most flags are clear (with pni apparently being SSE3). There are also CMPXCHG16B and LAHF-SAHF CPU features/instructions, but they are already part of qemu64 AFAICT. At least the example instructions cmpxchg16b (needs an operand) and lahf seem to work with my little test program and the cpuid-dump2 program also outputs -mcx16 -msahf indicating support. > min intel: Westmere > min amd : Opteron_G3 > > x86-64-v3 : Derived from qemu64 +aes;+popcnt;+pni;+sse4.1;+sse4.2;+ssse3;+avx;+avx2;+bmi1;+bmi2;+f16c;+fma;+abm;+movbe Again comparing with the table in the PDF all flags are clear (with abm adding the LZCNT feature/instruction). But isn't the OSXSAVE feature missing? At least if I try with my little test program above I get "illegal hardware instruction" for xgetbv (that is the example instruction for the OSXSAVE CPU Feature mentioned in the PDF) and the has_osxsave variable in the cpuid-dump2 program is also false. > > min intel: Haswell > min amd : EPYC_v1 > > x86-64-v4 : Derived from qemu64 +aes;+popcnt;+pni;+sse4.1;+sse4.2;+ssse3;+avx;+avx2;+bmi1;+bmi2;+f16c;+fma;+abm;+movbe;+avx512f;+avx512bw;+avx512cd;+avx512dq;+avx512vl > Those match up exactly with the table in the PDF, so should be fine (except the OSXSAVE feature will also be missing as v4 extends v3). > min intel: Skylake > min amd : EPYC_v4 > (...) > @@ -302,6 +321,17 @@ sub get_cpu_models { > }; > } > > + for my $model (keys %{$builtin_models}) { > + my $reported_model = $builtin_models->{$model}->{'reported-model'}; > + $reported_model //= $cpu_fmt->{'reported-model'}->{default}; Nit: we could just avoid this and similar fallbacks in the rest of the patch, because we know that 'reported-model' is set for the built-in models. But it's not a big deal and in a language like Perl we don't have compile-time checks for it, so I'm fine with either way. If you drop these fallbacks, please add a comment above $builtin_models stating that 'reported-model' has to be set.