From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate001.proxmox.com (gate001.proxmox.com [IPv6:2a0f:8001:1:32::40]) by lore.proxmox.com (Postfix) with ESMTPS id E40A71FF09F for ; Thu, 03 Sep 2026 12:25:36 +0200 (CEST) Received: from gate001.proxmox.com (localhost.localdomain [127.0.0.1]) by gate001.proxmox.com (Proxmox) with ESMTP id F14D7213A6; Thu, 03 Sep 2026 12:25:35 +0200 (CEST) From: Jonas Theisen To: pve-devel@lists.proxmox.com Subject: [PATCH pve-docs] vcpu-types: Update CPU models Date: Thu, 3 Sep 2026 12:21:21 +0200 Message-ID: <20260903102515.170236-1-j.theisen@proxmox.com> X-Mailer: git-send-email 2.47.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Bm-Milter-Handled: 55990f41-d878-4baa-be0a-ee34c49e34d2 X-Bm-Transport-Timestamp: 1788431128140 X-SPAM-LEVEL: Spam detection results: 0 AWL 0.530 Adjusted score from AWL reputation of From: address DMARC_MISSING 0.1 Missing DMARC policy KAM_DMARC_STATUS 0.01 Test Rule for DKIM or SPF Failure with Strict Alignment (newer systems) RCVD_IN_DNSWL_MED -2.3 Sender listed at https://www.dnswl.org/, medium trust SPF_HELO_NONE 0.001 SPF: HELO does not publish an SPF Record SPF_PASS -0.001 SPF: sender matches SPF record Message-ID-Hash: CWJ2C6BDY3DYT3XLOTLUZPSDP7MKUHTR X-Message-ID-Hash: CWJ2C6BDY3DYT3XLOTLUZPSDP7MKUHTR X-MailFrom: j.theisen@proxmox.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; loop; banned-address; emergency; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.10 Precedence: list List-Id: Proxmox VE development discussion List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Updated list of virtual CPU models of QEMU to the current state based on pve-qemu-kvm 11.0.3-3 Signed-off-by: Jonas Theisen --- qm-vcpu-list.adoc | 83 +++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 81 insertions(+), 2 deletions(-) diff --git a/qm-vcpu-list.adoc b/qm-vcpu-list.adoc index 2aa1bfd..9ea968a 100644 --- a/qm-vcpu-list.adoc +++ b/qm-vcpu-list.adoc @@ -75,8 +75,64 @@ https://en.wikipedia.org/wiki/List_of_Intel_Xeon_processors[Intel processors] + * 'Icelake-v6' : add "5-level EPT" ('+vmx-page-walk-5') + +* 'Icelake-v7' : re-enable TSX ('+hle', '+rtm') ++ * 'SapphireRapids' : https://en.wikipedia.org/wiki/Sapphire_Rapids[4th generation Xeon Scalable server processors] - ++ +* 'SapphireRapids-v2' : add "Fill Buffer Stale Data Propagator (FBSDP)" mitigation ('+fbsdp-no'), +"Primary Stale Data Propagator (PSDP)" mitigation ('+psdp-no'), +"Shared Buffers Data Read (SBDR)", "Stale Data Propagator (SSDP)" mitigation ('+sbdr-ssdp-no") ++ +* 'SapphireRapids-v3' : add "Stack segment" ('+ss'), "Cache Line Demote" ('+cldemote'), +"TSC adjust" ('+tsc-adjust','+tsc_adjust'), "Move Doubleword as Direct Store" ('+movdiri', '+movdir64b') ++ +* 'SapphireRapids-v4' : expose "Intel 0x1F CPUID leaf" ('+x-force-cpuid-0x1f'), +remove "legacy-cache" ('-legacy-cache') ++ +* 'SapphireRapids-v5' : add CET IBT and SS ('+cet-ibt','+cet-ss') ++ +* 'SapphireRapids-v6' : add "ITS" mitigation ('+its-no') ++ +* 'SierraForest' : https://en.wikipedia.org/wiki/Sierra_Forest[6th generation Xeon Scalable server processors with E-cores] ++ +* 'SierraForest-v2' : add "Register File Data Sampling (RFDS)" mitigation ('+rfds-no'), +"Fast Store Forwarding Predictor (FSFP)" ('+intel-psfd'), +"Gather Data Sampling (GDS)" mitigation ('+gds-no'), +"Stack segment" ('+ss'), "Cache Line Demote" ('+cldemote'), +"Linear Address Masking (LAM)" ('+lam'), +"TSC adjust" ('+tsc-adjust','+tsc_adjust'), +"Indirect Predictor Control" ('+ipred-ctrl'), +"Move Doubleword as Direct Store" ('+movdiri', '+movdir64b'), +"Branch History Injection Control" ('+bhi-ctrl'), +"Restricted Return Stack Buffer Alternate (RRSBA)" ('+rrsba-ctrl'), +change 'stepping' from '0' to '3' ++ +* 'SierraForest-v3' : expose "Intel 0x1F CPUID leaf" ('+x-force-cpuid-0x1f'), remove "legacy-cache" ('-legacy-cache') ++ +* 'SierraForest-v4' : add CET IBT and SS ('+cet-ibt','+cet-ss') ++ +* 'SierraForest-v5' : add "ITS" mitigation ('+its-no') ++ +* 'GraniteRapids' : https://en.wikipedia.org/wiki/Granite_Rapids[6th generation Xeon Scalable server processors with P-cores] ++ +* 'GraniteRapids-v2' : add AVX10 flags ('avx10', '+avx10-version', '+avx10-128', '+avx10-256', '+avx10-512'), +"Stack segment" ('+ss'), "Cache Line Demote" ('+cldemote'), +"TSC adjust" ('+tsc-adjust','+tsc_adjust'), +"Move Doubleword as Direct Store" ('+movdiri', '+movdir64b'), +change 'stepping' from '0' to '1', 'level' and 'min-level' from '32' to '36' ++ +* 'GraniteRapids-v3' : expose "Intel 0x1F CPUID leaf" ('+x-force-cpuid-0x1f'), remove "legacy-cache" ('-legacy-cache') ++ +* 'GraniteRapids-v4' : add CET IBT and SS ('+cet-ibt','+cet-ss') ++ +* 'GraniteRapids-v5' : add "ITS" mitigation ('+its-no') ++ +* 'ClearwaterForest': https://en.wikipedia.org/wiki/Clearwater_Forest[6+ generation Xeon Scalable server processors with E-cores] ++ +* 'ClearwarterForest-v2' : add CET IBT and SS ('+cet-ibt','+cet-ss') ++ +* 'ClearwarterForest-v3' : add "ITS" mitigation ('+its-no'), +expose "Intel 0x1F CPUID leaf" ('+x-force-cpuid-0x1f'), remove "legacy-cache" ('-legacy-cache') AMD CPU Types ------------- @@ -96,13 +152,36 @@ https://en.wikipedia.org/wiki/List_of_AMD_processors[AMD processors] * 'EPYC-v3' : add missing flags ('+perfctr-core', '+clzero', '+xsaveerptr', '+xsaves') + +* 'EPYC-v4' : no changes ++ +* 'EPYC-v5' : add "Software Uncorrectable Error Containment and Recovery capability" ('+succor'), +"Machine Check Architecture (MCA) overflow recovery" ('+overflow-recov') ++ * 'EPYC-Rome' : https://en.wikipedia.org/wiki/Zen_2[2nd generation of Zen processors] + * 'EPYC-Rome-v2' : add Spectre v2, v4 protection ('+ibrs', '+amd-ssbd') + +* 'EPYC-Rome-v3' : no changes ++ +* 'EPYC-Rome-v4' : remove "XSAVES" ('-xsaves') ++ +* 'EPYC-Rome-v5' : add "Software Uncorrectable Error Containment and Recovery capability" ('+succor'), +"Machine Check Architecture (MCA) overflow recovery" ('+overflow-recov') ++ * 'EPYC-Milan' : https://en.wikipedia.org/wiki/Zen_3[3rd generation of Zen processors] + * 'EPYC-Milan-v2' : add missing flags ('+vaes', '+vpclmulqdq', '+stibp-always-on', '+amd-psfd', '+no-nested-data-bp', '+lfence-always-serializing', '+null-sel-clr-base') - ++ +* 'EPYC-Milan-v3' : add "Software Uncorrectable Error Containment and Recovery capability" ('+succor'), +"Machine Check Architecture (MCA) overflow recovery" ('+overflow-recov') ++ +* 'EPYC-Genoa' : https://en.wikipedia.org/wiki/Zen_4[4th generation Zen processors] ++ +* 'EPYC-Genoa-v2' : add "Software Uncorrectable Error Containment and Recovery capability" ('+succor'), +"Machine Check Architecture (MCA) overflow recovery" ('+overflow-recov'), +"AMD Performance Monitoring Version 2" ('+perfmon-v2'), +"Support for FS and GS access from user space" ('+fs-gs-base-ns') ++ +* 'EPYC-Turin' : https://en.wikipedia.org/wiki/Zen_5[5th generation Zen processors] -- 2.47.3